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image of LMK1D2108 TI - VQFN (RGZ)
Dual bank 8-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer 7.384
image of LMK1D1208P TI - VQFN (RHA)
8-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer with pin control 5.115
image of CDCBT1001 TI - X2SON (DPW)
1.2-V to 1.8-V clock buffer and level translator 0.5
image of CDCDB800 TI - VQFN (RSL)
8-output clock buffer for PCIe® Gen 1 to Gen 6 1.84
image of CDCDB400 TI - VQFN (RHB)
4-output clock buffer for PCIe® Gen 1 to Gen 6 1.365
image of LMK1D1208 TI - VQFN (RHD)
8-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer 4.279
image of LMK1D1216 TI - VQFN (RGZ)
16-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer 7.015
image of LMK1D2102 TI - VQFN (RGT)
Dual bank 2-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer 3.51
image of LMK00804B-Q1 TI - VQFN (RGT)
Automotive, 1.5-V to 3.3-V, 1-to-4 high-performance LVCMOS fanout buffer & level translator 2.972
image of LMK00334-Q1 TI - WQFN (RTV)
Automotive 4-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator 1.087
image of CDCLVP111-EP TI - LQFP (VF)
HiRel, 1:10 LVPECL buffer with selectable input 22.996
image of CDCLVD1212 TI - VQFN (RHA)
Low jitter, 2-input selectable 1:12 universal-to-LVDS buffer 3.511
image of LMH2191 TI - DSBGA (YFX)
Dual-channel 52-MHz clock tree driver 1.021
image of CDCLVC1108 TI - TSSOP (PW)
Low jitter, 1:8 LVCMOS fan-out clock buffer 1.663
image of SN74SSQEA32882 TI - NFBGA (ZAL)
810-MHz, JEDEC SSTE32882 compliant 28-bit to 56-bit registered buffer with address-parity test 3.432
image of LMK01020 TI - WQFN (RHS)
1.6-GHz high performance clock buffer, divider, and distributor with 8 LVPECL outputs 7.003
image of LMK01000 TI - WQFN (RHS)
1.6-GHz high performance clock buffer, divider, and distributor with 3 LVDS & 5 LVPECL outputs 7.703
image of LMH2180 TI -
75-MHz dual clock buffer 1.056
image of CDCLVD110A TI -
1-to-10 LVDS clock buffer up to 1100-MHz with minimum skew for clock distribution 5.452
image of TLC2932A TI - TSSOP (PW)
Phase-locked loop systems 1.605
image of CDCVF310 TI - TSSOP (PW)
High performance 1:10 clock buffer for general purpose applications with support up to 85C 1.782
image of CDCVF2510 TI - TSSOP (PW)
3.3-V phase-lock loop clock driver with 10 outputs for DRAM applications 2.975
image of CDC337 TI - SOIC (DW)
1-To-8 CMOS clock driver with 3-state outputs 7.098
image of CDCDB803 TI - VQFN (RSL)
8-output clock buffer for PCIe® Gen 1 to Gen 6 with selectable SMBus addresses 1.84
image of LMK1D1208I TI - VQFN (RHA)
8-channel output, 1.8-V, 2.5-V, and 3.3-V LVDS buffer with I²C 5.115
image of
LMK1D2108
Dual bank 8-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer
：TI
image of
LMK1D1208P
8-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer with pin control
：TI
image of
CDCBT1001
1.2-V to 1.8-V clock buffer and level translator
：TI
image of
CDCDB800
8-output clock buffer for PCIe® Gen 1 to Gen 6
：TI
image of
CDCDB400
4-output clock buffer for PCIe® Gen 1 to Gen 6
：TI
image of
LMK1D1208
8-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer
：TI
image of
LMK1D1216
16-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer
：TI
image of
LMK1D2102
Dual bank 2-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer
：TI
image of
LMK00804B-Q1
Automotive, 1.5-V to 3.3-V, 1-to-4 high-performance LVCMOS fanout buffer & level translator
：TI
image of
LMK00334-Q1
Automotive 4-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator
：TI
image of
CDCLVP111-EP
HiRel, 1:10 LVPECL buffer with selectable input
：TI
image of
CDCLVD1212
Low jitter, 2-input selectable 1:12 universal-to-LVDS buffer
：TI
image of
LMH2191
Dual-channel 52-MHz clock tree driver
：TI
image of
CDCLVC1108
Low jitter, 1:8 LVCMOS fan-out clock buffer
：TI
image of
SN74SSQEA32882
810-MHz, JEDEC SSTE32882 compliant 28-bit to 56-bit registered buffer with address-parity test
：TI
image of
LMK01020
1.6-GHz high performance clock buffer, divider, and distributor with 8 LVPECL outputs
：TI
image of
LMK01000
1.6-GHz high performance clock buffer, divider, and distributor with 3 LVDS & 5 LVPECL outputs
：TI
image of
LMH2180
75-MHz dual clock buffer
：TI
image of
CDCLVD110A
1-to-10 LVDS clock buffer up to 1100-MHz with minimum skew for clock distribution
：TI
image of
TLC2932A
Phase-locked loop systems
：TI
image of
CDCVF310
High performance 1:10 clock buffer for general purpose applications with support up to 85C
：TI
image of
CDCVF2510
3.3-V phase-lock loop clock driver with 10 outputs for DRAM applications
：TI
image of
CDC337
1-To-8 CMOS clock driver with 3-state outputs
：TI
image of
CDCDB803
8-output clock buffer for PCIe® Gen 1 to Gen 6 with selectable SMBus addresses
：TI
image of
LMK1D1208I
8-channel output, 1.8-V, 2.5-V, and 3.3-V LVDS buffer with I²C
：TI

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